“Embedded vision enables designers to add visual intelligence to systems, making them safer, smarter and more responsive,” said Jeff Bier, founder of the Embedded Vision Alliance (www.Embedded-Vision.com). “But embedded vision is processing-intensive and most applications demand extreme cost- and energy-efficiency while also requiring programmability to accommodate new algorithms and new functions over time. Custom processors like those enabled by the SynopsysEmbedded Vision Development System often yield the best mix of performance, efficiency and flexibility. I applaud Synopsys for recognizing and supporting the growing importance of embedded vision.”
The Embedded Vision Development System includes pre-verified design examplesto helpdesigners quickly implement an ASIP optimized to meet their specific SoC objectives for power consumption and performance. It provides a ready-to-use, modifiable base processor including a full C/C++ compiler,which supportsall functions provided by the OpenCV library. The execution of the compiled code with the automatically-generated instruction-set simulator (ISS) is easy to profile, clearly identifying performance-intensive parts of the application,which can be accelerated by changes in the processor architecture, including memory access, register configuration and instruction set. Unlike configurable processors that rely on a fixed pipelineand register structure,this methodology removes limitations fromachieving the most power- and performance-optimized custom architecture for their application. Using the automatically generated software tools, designers easily recompile and simulate the C/C++ programuntil they achieve their design goals.
Processor Designer generates optimized RTL of the ASIP, which can easily be downloaded into a HAPS FPGA-based prototyping system. Designers save implementation effort with an easy-to-use flow from RTL generation to instantiation in the HAPS system,using the same RTL from design through validation. HAPS prototypes allow the design team adopting the application-specific processor to integrate other digital IP intothe SoC design and connect the prototype with real-world I/O such as cameras and memoryto validate the hardware-software integration. Running more than100x faster than a cycle-accurate ISS-based model, the combination of Processor Designer and HAPS in the new integrated design and prototyping system provides a highly-efficient way to refineand validateASIP architectures from project to project.
“Many types of electronic devices require designers to develop custom processors to meet unique performance goals most efficiently, such as the processing of large amounts of visual data in embedded vision systems,” said John Koeter, vice president of marketing for IP and systems at Synopsys. “The Synopsys Embedded Vision Development System, based on Processor Designer and a linkage to HAPS FPGA-based prototyping, saves months of engineering effort by combining software and hardware tools that enable designersto analytically arrive at the best processor implementation for their specific application,then quickly prototype the entire SoC to complete the hardware/software integration.”
Availability& Resources
The Embedded Vision DevelopmentSystem is immediately available from Synopsys.
o Learn more about the Embedded Vision Development Systemhttp://www.synopsys.com/PD
Embedded Vision Development System at the Embedded Vision Summit 2013
Synopsys will be demonstrating the Embedded Vision Development Systemat the Embedded Vision Summitin San Jose, California on April 25, 2013. For more information:
http://www.embedded-vision.com/embedded-vision-summit.
About Synopsys
Synopsys, Inc. (Nasdaq:SNPS) accelerates innovation in the global electronics market. As a leader in electronic design automation (EDA) and semiconductor IP, its software, IP and services help engineers address their design, verification, system and manufacturing challenges. Since 1986, engineers around the world have been using Synopsys technology to design and create billions of chips and systems.Learn more at http://www.synopsys.com.
